Hi, In this message I describe the hardware and mapper operation of a 76-in-1 Famicom cartridge that I am borrowing. *NOTE: I am using mapper number $E2 = 226 for the 76-in-1 mapper.* As per my extended header format proposal, header byte 10 bit 4 is set to indicate that this cartridge does not have extra WRAM at $6000-$7FFF In this archive there are also: - .nes file containing only the game selection menu, so you can see what it looks like on current emulators - (poor quality) pictures of the cart case and PCB Hardware description -------------------- This cart uses "black blob" type chips for the PRG ROM and CHR-RAM. It has 16Mbit PRG and 8K CHR-RAM. There are holes on the board for DIL ICs; this would allow the manufacturer to use either the chip-on-board or normal DIL packages. Th holes made it much easier for me to figure out how the mapping works. The cartridge is faulty. The owner accidentally inserted it back-to-front in a Famicom-to-NES adapter. When connected to a real console now, the graphics are messed up but the code seems to still be okay. This suggests that the PRG ROM is intact, but the RAM chip is faulty. I may try and remove the black blob RAM and replace it with a normal 6264 chip. This would get the cart working again, assuming that none of the 74-series ICs were blown. Anyway, faulty RAM will not of course affect whether the cart is dumpable at all. Mapper hardware is provided by five 74-series ICs; LS74A, LS273, LS139, LS02 and LS153. The latest chip manufacture date is 9518, so this is a fairly recent cartridge. A diode and capacitor are arranged to reset the mapping when the Reset button is pressed; see my other post about this. If a DIL ROM IC is used, it has 42 pins. This is an 8/16-bit chip; the pinout is similar to e.g. the AMD Am27C400 8/16-bit 4Mbit EPROM. It is of course wired to work in 8-bit mode. (Do AMD now make a 16Mbit EPROM like this? In the 1995/96 data book I have 4Mbit is the largest listed.) Mapper description ------------------ *NOTE: I am using mapper number $E2 = 226 for the 76-in-1 mapper.* This mapper should be quite easy to support in emulators. It has two write-only registers, which I will call #0 and #1. Register #0 is set by writing to any even address at $8000 or above; $8000, $8002, ..., $FFFC, $FFFE. Register #1 is set by writing to any odd address at $8001 or above; $8001, $8003, ..., $FFFD, $FFFF. The values written work like this: D7 | D6 | D5 | D4 D3 D2 D1 | D0 ----+----+----+-------------------+---- Register #0: p4 | m | z | p3 p2 p1 p0 | q -----------------------------+----+---- Register #1: - - - - - - | w | p5 --------------------------------------- p5-p0 are the bits corresponding to the desired 32K page number. m sets the mirroring state: 0 - vertical scrolling, "horizontal mirroring" 1 - horizontal scrolling, "vertical mirroring" z sets the PRG page size: 0 - 32K 1 - 16K q selects whether the upper or lower half of a 32K block will appear at both $8000 and $C000 in 16K PRG page size mode. It is unused when PRG page size is 32K. 0 - lower half appears at $8000 and $C000 1 - upper half appears at $8000 and $C000 w controls whether the CHR-RAM is write-protected: 0 - not write-protected 1 - write-protected When the Reset button is pressed, both registers are reset to all zero bits. For example, writing $76 to $EDCC and $3 to $A899 would mean: - 16K PRG page size - horizontal scrolling (= vertical mirroring) - CHR-RAM write-protected - The %101011 = 32+8+2+1 = 43rd 32K PRG block selected, and the lower half of this block appears at both $8000 and $FFFF -- Mark